| Project Name | CID | Checker | Category | Developer Description |
|---|---|---|---|---|
| Linux | 741147 | DEADCODE | Control flow issues | This error detected by CoverityScan detected a case where the driver would never run at the maximum CPI clock speed. The deadcode detection allowed me to easily spot the bug and the fix now allows the driver to crank up the maximum PCI clock speed from 25MHz to 40MHz! |
992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 |
dpll_clk = info->dpll_clk;
pci_clk = (f_cnt * dpll_clk) / 192;
/* Clamp PCI clock to bands. */
if (pci_clk < 40)
pci_clk = 33;
else if(pci_clk < 45)
pci_clk = 40;
else if(pci_clk < 55)
pci_clk = 50;
else
pci_clk = 66;
printk(KERN_INFO "%s %s: DPLL base: %d MHz, f_CNT: %d, "
"assuming %d MHz PCI\n", name, pci_name(dev),
dpll_clk, f_cnt, pci_clk);
} else {
u32 itr1 = 0;
pci_read_config_dword(dev, 0x40, &itr1);
/* Detect PCI clock by looking at cmd_high_time. */
switch((itr1 >> 8) & 0x07) { |
<<< CID 741147: Control flow issues DEADCODE <<< Execution cannot reach this statement: "case 9U:".
1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 |
case 0x09: pci_clk = 40; break; case 0x05: pci_clk = 25; break; case 0x07: default: pci_clk = 33; break; } } /* Let's assume we'll use PCI clock for the ATA clock... */ switch (pci_clk) { case 25: clock = ATA_CLOCK_25MHZ; break; case 33: default: clock = ATA_CLOCK_33MHZ; break; case 40: clock = ATA_CLOCK_40MHZ; break; case 50: clock = ATA_CLOCK_50MHZ; |
| dead_error_condition | hpt366.c:1016 | |
| dead_error_begin | hpt366.c:1016 |